Such a wafer of the kind mentioned in the opening paragraph and such a chip of the kind mentioned in the second paragraph have been marketed by applicant in various embodiments and are accordingly known. In the known wafer, the connection lines are formed by conductor tracks in a known manner, which conductor tracks are substantially U-shaped and comprise two mutually adjoining conductor track portions as the mutually adjoining conductor portions, such that the two mutually adjoining conductor track portions of different connection lines may indeed have different widths so as to achieve different conductor track resistance values, but still all conductor track portions have a constant width. Furthermore, the known wafer is constructed such that the protecting strips covering the conductor tracks also have a constant width all along their strip extensions. This has the consequence that substantially right-angled corners are present in those locations of the wafer where two mutually adjoining protecting strips project from the planar protecting layer for the chip at the chip boundary of this chip. The elongate separating zones between the chips have a comparatively great width in the known wafer, the width of the elongate separating zones being 100 μm, 80 μm, or 70 μm, depending on the embodiment of the known wafer. As long as the elongate separating zones between the chips have the width mentioned above, no problems with fracture zones in the wafer usually occur during separating of the wafer along the elongate separating zones in the regions of the transitions of the mutually adjoining protecting strips and the mutually adjoining conductor portions.
If the elongate separating zones are to be considerably narrower, however, i.e. the widths of the elongate separating zones should lie at values of 40 μm, 30 μm, 20 μm or 10 μm so as to achieve the advantage of a better utilization of the wafer surface, then problems arise if no special measures are taken. Tests carried out on wafers having such substantially narrower separating zones have shown that fracture zones caused by separating of the wafer disadvantageously occur much more frequently in the known constructions of the mutually adjoining conductor portions and the mutually adjoining protecting strips of these wafers. This problem is aggravated by the envisaged, and indeed realized wafer thicknesses. Standard wafers provided for a plastic assembly usually require a wafer thickness of 200 μm to 380 μm. More advanced chip packaging applications, however, require wafer thicknesses of 180 μm, 150 μm, and 120 μm. Wafer thicknesses of 180 μm, 150 μm, and 120 μm, and recently even 50 μm, are also required for chip card ICs. Chips for paper applications require wafer thicknesses of 50 μm, 40 μm, down to 20 μm. Given such thin wafers, the occurrence of fracture zones (cracks) at the connection lines (sawing loops) is highly critical, because the fracture zones can propagate much more quickly and easily in the thin wafer, especially in bending processes, than is the case for thick wafers. These fracture zones usually start in the vicinity of the free ends of the remnants of the protecting strips present after separating of the wafer and oft extend relatively deeply into the chips.